This paper proposes an approach to handling imprecision in design and
concurrent engineering systems by using interval analysis and constrai
nt networks. By allowing design parameters to be specified with interv
als rather than exact points, this approach permits designers to itera
tively transform vague conceptual designs into detailed final designs.
When a designer changes a variable's interval or assigns a value, the
results are propagated through constraints and the resulting feasible
interval for all other dependent variables is pruned. The interval co
nstraint network approach described in this paper extends previous wor
k by allowing the representation of and reasoning about complex constr
aints involving conditions, conjunctions and disjunctions, as well as
both symbolic and numeric variables. Many concurrent engineering const
raints cannot be modeled without this sort of representational flexibi
ity. A prototype of this approach has been implemented in a system cal
led SPARK-IP. The operation of SPARK-IP is demonstrated through a conc
urrent engineering design problem involving printed wiring boards.