MULTILAYER CAPACITOR MARGIN STRESSES AND ELECTRODE TO DIELECTRIC THICKNESS CALCULATIONS

Citation
W. Carlson et al., MULTILAYER CAPACITOR MARGIN STRESSES AND ELECTRODE TO DIELECTRIC THICKNESS CALCULATIONS, Ferroelectrics. Letters section, 21(1-2), 1996, pp. 1-9
Citations number
6
Categorie Soggetti
Physics, Condensed Matter
ISSN journal
07315171
Volume
21
Issue
1-2
Year of publication
1996
Pages
1 - 9
Database
ISI
SICI code
0731-5171(1996)21:1-2<1:MCMSAE>2.0.ZU;2-H
Abstract
The mismatch of thermal expansion coefficients in co-fired multilayer capacitors (MLCs) leads to development of residual stress on cooling. These stresses are of a compressive nature for the multilayer stack an d a tensile character for the ceramic margin. A closed-form stress cal culation of the critical ratio of electrode thickness to ceramic diele ctric thickness in the stack shows a limiting ratio of approximately 1 :2. Design equations are given in order to calculate the multilayer el ectrode to dielectric thickness ratio. The required design parameters are the linear thermal expansion coefficients, the temperature differe nce, the Young's moduli, the strength of the ceramic margin, and the r atio of active to inactive capacitor area.