INTEGRATION OF MEDIUM-THROUGHPUT SIGNAL-PROCESSING ALGORITHMS ON FLEXIBLE INSTRUCTION-SET ARCHITECTURES

Integrated circuits in telecommunications and consumer electronics are rapidly evolving towards single chip solutions. New IC architectures are emerging, which combine instruction-set processor cores with custo mised hardware. This paper describes a high-level synthesis system for integration of real-time signal processing systems on such processor cores. The compiler supports a flexible architectural model. It can ha ndle certain types of incompletely specified architectures, and offers capabilities for retargetable compilation and architectural explorati on. Results for a realistic application from the domain of audio proce ssing indicate the feasibility and power of the presented approach.