A 4.4-NS CMOS 54X54-B MULTIPLIER USING PASS-TRANSISTOR MULTIPLEXER

A 54 x 54-b multiplier using pass-transistor multiplexers has been fab ricated by 0.25 mu m CMOS technology, To enhance the speed performance , a new 4-2 compressor and a carry lookahead adder (CLA), both featuri ng pass-transistor multiplexers, have been developed, The new circuits have a speed advantage over conventional CMOS circuits because the nu mber of critical-path gate stages is minimized due to the high logic f unctionality of pass-transistor multiplexers. The active size of the 5 4 x 54-b multiplier is 3.77 x 3.41 mm, The multiplication time is 4.4 ns at a 2.5-V power supply.