BOOTSTRAPPED FULL-SWING BICMOS BINMOS LOGIC-CIRCUITS FOR 1.2-3.3 V SUPPLY VOLTAGE REGIME/

Citation
A. Bellaouar et al., BOOTSTRAPPED FULL-SWING BICMOS BINMOS LOGIC-CIRCUITS FOR 1.2-3.3 V SUPPLY VOLTAGE REGIME/, IEEE journal of solid-state circuits, 30(6), 1995, pp. 629-636
Citations number
14
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00189200
Volume
30
Issue
6
Year of publication
1995
Pages
629 - 636
Database
ISI
SICI code
0018-9200(1995)30:6<629:BFBBLF>2.0.ZU;2-G
Abstract
Novel full-swing BiCMOS/BiNMOS logic circuits using bootstrapping in t he pull-up section for low supply voltage down to 1 V are reported, Th ese circuit configurations use noncomplementary BiCMOS technology, Sim ulations have shown that they outperform other BICMOS circuits at low supply voltage using 0.35 mu m BiCMOS process, The delay acid power di ssipation of several NAND configurations have been compared, The new c ircuits offer delay reduction between 40 and 66% over CMOS in the rang e 1.2-3.3 V supply voltage, The minimum fanout at which the new circui ts outperform CMOS gate is 5, which is lower than that of other gates particularly for sub-2.5 V operation.