A SINGLE-CHIP 9-32 MB S READ WRITE CHANNEL FOR DISK-DRIVE APPLICATIONS/

This paper reports on a single-chip read/write channel for disk drive, The integrated circuit implements a peak detector architecture fully compatible with zoned-bit recording applications, The chip contains al l the functions needed to implement a high performance read channel, i .e., pulse detector, programmable active filter, servo demodulator, fr equency synthesizer, data separator and RLL(1,7) ENDEC. The design has been done in a way that takes full advantage of the features availabl e in a BiCMOS technology to achieve power saving, high speed and immun ity to cross-talk from digital to analog, The IC is fabricated in a 1. 2 mu BICMOS technology and has an active area of approximately 28 mm(2 ). While operating from a single 5 V supply the power consumption is o nly 450 mW at 32 Mb/s.