A COMMUNICATION SCHEME FOR ANALOG VLSI PERCEPTIVE SYSTEMS

A communication architecture tailored for analog VLSI perceptive syste ms is proposed, Information is generated on a transmitter array of cel ls each driving a pulse generator, The resulting pulse-frequency modul ated signals are transmitted through the nonarbitered, asynchronous ac cess of pulses to a common bus. Pulses are decoded and accumulated in a receiver chip and the mapping of the activity distribution of the tr ansmitter onto the receiver is achieved, One possible implementation o f these principles is presented, The circuit description of all blocks is given and experimental results are shown: they satisfactorily supp ort the theoretical basis upon which the system was constructed. Exten sions to the communication architecture are finally presented.