Js. Park et Gs. Ahn, A SOFTWARE-CONTROLLED PREFETCHING MECHANISM FOR SOFTWARE-MANAGED TLBS, Microprocessing and microprogramming, 41(2), 1995, pp. 121-136
The TLB (Translation Lookaside Buffer) miss services have been conceal
ed from operating systems, but some new RISC architectures manage the
TLB in software. Since software-managed TLBs provide flexibility to an
operating system in page translation, they are considered an importan
t factor in the design of microprocessors for open system environments
. However, software-managed TLBs suffer from larger miss penalty than
hardware-managed TLBs, since they require more extra context switching
overhead than hardware-managed TLBs. This paper introduces a new tech
nique for reducing the miss penalty of software-managed TLBs by prefet
ching necessary TLB entries before being used. This technique is not i
nherently Limited to specific applications. The key of this scheme is
to perform the prefetch operations to update the TLB entries before fi
rst accesses so that TLB misses can be avoided. Using trace-driven sim
ulation and a quantitative analysis, the proposed scheme is evaluated
in terms of the miss rate and the total miss penalty. Our results show
that the proposed scheme reduces the TLB miss rate by a factor of 6%
to 77% due to TLB characteristics and page sizes. In addition, it is f
ound that reducing the miss rate by the prefetching scheme reduces the
total miss penalty and bus traffics in software-managed TLBs.