DISTRIBUTED HARDWIRED BARRIER SYNCHRONIZATION FOR SCALABLE MULTIPROCESSOR CLUSTERS

Conventional multiprocessors mostly use centralized, memory-based barr iers to synchronize concurrent processes created in multiple processor s. These centralized barriers often become the bottleneck or hot spots in the shared memory, In this paper, we overcome the difficulty by pr esenting a distributed and hardwired barrier architecture, that is hie rarchically constructed for fast synchronization in cluster-structured multiprocessors, The hierarchical architecture enables the scalabilit y of cluster-structured multiprocessors. A special set of synchronizat ion primitives is developed for explicit use of distributed barriers d ynamically, To show the application of the hardwired barriers, we demo nstrate how to synchronize Doall and Doacross loops using a limited nu mber of hardwired barriers, Timing analysis shows an O(10(2)) to O(10( 5)) reduction in synchronization overhead, compared with the use of so ftware-controlled barriers implemented in a shared memory, The hardwir ed architecture is effective is implementing any partially ordered set of barriers or fuzzy barriers with extended synchronization regions, The versatility, scalability, programmability, and low overhead make t he distributed barrier architecture attractive in constructing fine-gr ain, massively parallel MIMD systems using multiprocessor clusters wit h distributed shared memory.