WEAR-OUT OF ULTRA-THIN GATE OXIDES DURING HIGH-FIELD ELECTRON-TUNNELING

Citation
M. Depas et al., WEAR-OUT OF ULTRA-THIN GATE OXIDES DURING HIGH-FIELD ELECTRON-TUNNELING, Semiconductor science and technology, 10(6), 1995, pp. 753-758
Citations number
21
Categorie Soggetti
Engineering, Eletrical & Electronic","Physics, Condensed Matter","Material Science
ISSN journal
02681242
Volume
10
Issue
6
Year of publication
1995
Pages
753 - 758
Database
ISI
SICI code
0268-1242(1995)10:6<753:WOUGOD>2.0.ZU;2-C
Abstract
Ultra-thin (<6 nm) SiO2 wear-out is characterized by time-dependent di electric breakdown and stress-induced leakage current (SILC) measureme nts on n(+) poly-Si/SiO2/n-Si capacitors, stressed by high-field tunne l injection of electrons from the Si substrate. A drastic increase of the charge to breakdown (Q(BD)) and a strong decrease of the SILC are observed for thinner oxide layers and lower tunnel current densities. This is explained by the corresponding reduction of the hot-electron e nergy during stressing. With the decrease in gate oxide thickness from 6 nm to 3 nm, a transition from Fowler-Nordheim to direct electron tu nnelling is observed in the current-voltage characteristics of the cap acitors. It is demonstrated that no significant wear-out occurs in a 3 .5 nm oxide layer for direct tunnelling of electrons from the Si subst rate.