INFLUENCE OF TECHNOLOGICAL PARAMETERS AND TEMPERATURE ON SUBSTRATE CURRENT MODELING IN SHORT-CHANNEL NMOS DEVICES

The dimensions miniaturization of the MOS transistors has increased co nsiderably to the seal and the speed of the integrated circuits. But t his reduction can entail the parasites effects, especially the substra te current which can degrade the characteristics of device and then th eir performance. The purpose of this paper is the substrate current mo delling in terms of the technological parameters (channel length, oxid e thickness, substrate doping) and the temperature, using the 2-D devi ce simulator MINIMOS 4, to optimizase the characteristics and the reli ability in short channel MOS transistor (ULSI technology). The results of the modelling and the simulation show that this leakage current in creases as the channel length, the oxide thickness, and the temperatur e decrease. We have shown that the substrate doping must be weaker in the channel region close to drain (LDD technology).