The heart of an IBM Sp2(TM) system is the High-Performance Switch, whi
ch is a low-latency, high-bandwidth switching network that binds toget
her RISC System/6000(R) processors. The switch incorporates a unique c
ombination of topology and architectural features to scale aggregate b
andwidth, enhance reliability, and simplify cabling. It is a bidirecti
onal multistage interconnect subsystem driven by a common oscillator a
nd delivers both data and service packets over the same links. Switchi
ng elements contain a dynamically allocated shared buffer for storing
blocked packet flits. The switch is constructed primarily from switchi
ng elements (the Vulcan switch chip) and adapters (the SP2 communicati
on adapter). The SP2 communication adapter uses a variety of technique
s to improve bandwidth and offload communication tasks from the node p
rocessor. This paper examines the switch architecture and presents an
overview of its support software.