V. Parthasarathy et al., 500-V, N-CHANNEL ATOMIC LATTICE LAYOUT (ALL) IGBT WITH SUPERIOR LATCHING IMMUNITY, IEEE electron device letters, 16(7), 1995, pp. 325-327
Experimental and simulation results for the impact of Atomic Lattice L
ayout (ALL) geometry on the latchup performance of 500 V n-channel IGB
T's is reported here for the first time and is compared to the convent
ional square, hexagonal and stripe geometries. It is shown that the AL
L cell IGBT's provide a superior trade-off between optimization of for
ward drop and latching current with a small penalty in the forward dro
p.