1.1V HIGH-SPEED LOW-POWER BICMOS LOGIC-CIRCUIT

A 1.1 V full-swing high speed, low power BiCMOS logic circuit is prese nted. It consists of nine devices and uses noncomplementary BiCMOS pro cess. Bootstrapping and partial charge removal techniques are employed . HSPICE simulations have shown that the new circuit outperforms both CMOS and a recently reported circuit in terms of speed and power-delay product. An analytical expression relating the pull-up delay with its device parameters is also derived.