RAPID THERMAL-OXIDATION OF SILICON WITH DIFFERENT THERMAL ANNEALING CYCLES IN NITROGEN - INFLUENCE ON SURFACE MICROROUGHNESS AND ELECTRICALCHARACTERISTICS
Sg. Dossantos et al., RAPID THERMAL-OXIDATION OF SILICON WITH DIFFERENT THERMAL ANNEALING CYCLES IN NITROGEN - INFLUENCE ON SURFACE MICROROUGHNESS AND ELECTRICALCHARACTERISTICS, Semiconductor science and technology, 10(7), 1995, pp. 990-996
The influence of two different thermal annealing cycles on the microro
ughness of the Si-SiO2 interface and on the electrical characteristics
of the Si-SiO2 system has been investigated. Experiments were perform
ed growing oxides by rapid thermal oxidation (RTO) and post-oxidation
annealing in N-2 using a slow cooling ramp recipe (SCRR) or a conventi
onal pulsed thermal annealing recipe (PTAR). Compared to PTAR, SCRR yi
elded a more severe annealing in N-2 and slower temperature decay afte
r RTO. The thickness of the as-grown oxides was measured by ellipsomet
ry in the whole wafer area. Laser light scattering (LLS) at a grazing
angle and atomic force microscopy (AFM) have been used for measuring t
he Si-SiO2 interface topography after the SiO2 removal. LLS was mainly
used for large-area scans (micrometric resolution) and AFM for small-
size areas (atomic resolution). The results showed that oxides prepare
d with SCRR exhibited a smoother Si-SiO2 interface at the nanometric s
cale and protrusions up to 2.5 nm high and up to 100 nm wide ('large p
rotrusions') at a submicrometre scale. On the other hand, the oxides p
repared with PTAR resulted in an Si-SiO2 interface with protrusions up
to 2 nm high and up to 5 nm wide ('sharp protrusions') at the nanomet
ric scale and broad localized regions, sparsely distributed over the w
afer area, with high root mean square (RMS) microroughness. By measuri
ng the electrical parameters of a large number of MOS capacitors made
with these oxides, we demonstrated evident experimental correlation of
the electric breakdown field (E(bd)), charge to breakdown (Q(bd)), Si
-SiO2 interface state density (D-it) and Al-SiO2 potential barrier hei
ght (phi(0)) with surface microroughness and therefore with the therma
l annealing cycle in N-2. The oxides prepared by SCRR exhibited improv
ed overall electrical parameters as compared to the oxides prepared by
PTAR.