A CMOS mixer topology for use in highly integrated downconversion rece
ivers is presented, The mixing is based on the modulation of nMOS tran
sistors in the triode region which renders an excellent Linearity inde
pendent of mismatch, With two extra capacitors added to the classical
cross-coupled MOSFET-C lowpass filter structure, GHz signals can be pr
ocessed while only a low-frequency opamp is required as output amplifi
er. The downconversion mixer has an input bandwidth of 1.5 GHz. The me
asured third-order intercept point (IP3) of 45.2 dBm demonstrates the
high linearity, The mixer has been implemented in a 1.2 mu m CMOS proc
ess. It takes up 1 mm(2) of total chip area and its power consumption
is 1.3 mW from a single 5 V power supply.