A 3.0 V 40 MB S HARD-DISK DRIVE READ CHANNEL IC/

This paper presents a high performance low power BICMOS mixed signal A SIC that integrates all the electronics required by a hard disk drive (HDD) read channel, The IC includes the automatic gain control (AGC) c ircuit, a programmable continuous-time filter, two pulse qualifiers, t he servo demodulator, the time base generator, the data synchronizer, and the encoder/decoder. Constant density recording with data rates be tween 14 and 40 Mb/s in 1,7 Run Length Limited (RLL) format and embedd ed 4-burst servo are supported, All the chip's specifications are guar anteed for supply voltages ranging from 3.0-5.5 V. Programming and tes ting are achieved via a 3-terminal bi-directional serial interface and internal registers, Nominal power dissipation at 3.0 V supply and 40 Mb/s data rate is 360 mW. Pulse pairing and write data jitter, two key performance parameters, each measured less than 300 ps.