DESIGN AND ARCHITECTURE OF A NEW SPACE PRIORITY MECHANISM FOR ATM NETWORK NODES

Citation
M. Lemercier et G. Pujolle, DESIGN AND ARCHITECTURE OF A NEW SPACE PRIORITY MECHANISM FOR ATM NETWORK NODES, Telecommunication systems, 4(1-2), 1995, pp. 33-49
Citations number
21
Categorie Soggetti
Telecommunications
Journal title
ISSN journal
10184864
Volume
4
Issue
1-2
Year of publication
1995
Pages
33 - 49
Database
ISI
SICI code
1018-4864(1995)4:1-2<33:DAAOAN>2.0.ZU;2-1
Abstract
This paper presents the architecture of a new space priority mechanism intended to control cell loss in ATM switches. Our mechanism is a new generic concept called: the multiple pushout. It is based on the util ization of both AAL and ATM features and on a particular definition of the priority bit. Whenever one cell of a message overflows the buffer of an ATM switch, the algorithm causes the switch to discard other ce lls of the message (including later arrivals). Such discarding frees b uffer spaces for cells of other messages that have a chance of arrivin g at their destination intact. Our objective is to emphasize that in c ase of overload, with most of proposed mechanisms, cells are discarded without any semantic information about the type of cells. Therefore, at the destination, all the fragments of the corrupted messages will b e discarded anyway. Finally, we present simulation results comparing c ell loss rates and message loss rates of several space priority mechan isms.