BIAS STRESS STUDIES OF A-SIN-H A-SI-H MIS STRUCTURES FROM QUASI-STATIC CAPACITANCE MEASUREMENTS/

Quasistatic capacitance measurements are used to study the effect of t hermal bias annealing where small gate bias stresses ranging from -5 V to +6 V are applied at 200 degrees C for 15 min on top nitride amorph ous silicon-silicon nitride MIS structures. After negative gate bias s tresses, the C(V-G) curves (capacitance versus gate bias) are found to be slightly shifted towards negative voltages and their shape is alte red. The minimum of the C(V-G) curves increases with the stress amplit ude indicating the creation of defects in the probed energy range. Aft er positive gate bias stresses, C(V-G) curves are shifted towards posi tive voltages without showing any significant shape changes. This indi cates either that negative charges have been injected into the insulat or, or that negatively charged defects have been created in the a-Si:H layer (or at the a-Si:H/nitride interface) outside the probed energy range (0.15-0.65 eV below the conduction band edge). The results can b e qualitatively described by changes in the defect distribution in agr eement with what is expected in the framework of the defect pool model .