PATTERN INDEPENDENT MAXIMUM CURRENT ESTIMATION IN POWER AND GROUND BUSES OF CMOS VLSI CIRCUITS - ALGORITHMS, SIGNAL CORRELATIONS, AND THEIRRESOLUTION

Currents flowing in the poser and ground (P&G) buses of CMOS digital c ircuits affect both circuit reliability and performance by causing exc essive voltage drops. Excessive voltage drops manifest themselves as g litches on the P&G buses and cause erroneous logic signals and degrada tion in switching speeds, Maximum current estimates are needed at ever y contact point in the buses to study the severity of the voltage drop problems and to redesign the supply lines accordingly, These currents , however, depend on the specific input patterns that are applied to t he circuit, Since it is prohibitively expensive to enumerate all possi ble input patterns, this problem has, for a long time, remained largel y unsolved, In this paper, we propose a pattern-independent, linear ti me algorithm (iMax) that estimates at every contact point, an upper bo und envelope of all possible current waveforms that result by the appl ication of different input patterns to the circuit, The algorithm is e xtremely efficient and produces good results for most circuits as is d emonstrated by experimental results on several benchmark circuits, The accuracy of the algorithm can be further improved by resolving the si gnal correlations that exist inside a circuit, We also present a novel partial input enumeration (PIE) technique to resolve signal correlati ons and significantly improve the upper bounds for circuits where the bounds produced by iMax are not tight. We establish with extensive exp erimental results that these algorithms represent a good time-accuracy trade-off and are applicable to VLSI circuits.