SIGNIFICANT REDUCTION IN THE SOFT ERROR SUSCEPTIBILITY OF GAAS FIELD-EFFECT TRANSISTORS WITH A LOW-TEMPERATURE-GROWN GAAS BUFFER LAYER

The use of a low temperature grown GaAs buffer layer beneath the chann el of a metal-semiconductor field-effect transistor is shown via compu ter simulation to reduce ion-induced charge collection by two or more orders of magnitude. This reduction in collected charge is expected to reduce the heavy ion soft error rate by four to seven orders of magni tude in GaAs integrated circuits, and could have significant implicati ons for the applicability of GaAs technology in space-based systems. ( C) 1995 American Institute of Physics.