A FULLY DIFFERENTIAL COMPARATOR USING A SWITCHED-CAPACITOR DIFFERENCING CIRCUIT WITH COMMON-MODE REJECTION

Authors
SHIH TC DER L LEWIS SH HURST PJ
Citation
Tc. Shih et al., A FULLY DIFFERENTIAL COMPARATOR USING A SWITCHED-CAPACITOR DIFFERENCING CIRCUIT WITH COMMON-MODE REJECTION, IEEE journal of solid-state circuits, 32(2), 1997, pp. 250-253
Citations number
16
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
IEEE journal of solid-state circuits → ACNP
ISSN journal
00189200
Volume
32
Issue
2
Year of publication
1997
Pages
250 - 253
Database
ISI
SICI code
0018-9200(1997)32:2<250:AFDCUA>2.0.ZU;2-I
Abstract
A fully differential comparator is described, It uses a switched-capac itor differencing circuit that provides common-mode rejection The comp arator has been tested by building a 3-b flash analog-to-digital conve rter (ADC) in a 2-mu m CMOS process. With a supply voltage of 3.3 V, a sampling rate of 25 MHz, and full-stale sinusoidal inputs up to 7 MHz , the signal-to-distortion ratio of the ADC when the input is single e nded is about 1-2 dB less than when the input is differential, In a 2- mu m CMOS process, the comparator occupies 0.25 mm(2) and dissipates 1 .05 mW.