A HIGH-PERFORMANCE RDS-DETECTOR FOR LOW-VOLTAGE APPLICATIONS

The design and realisation of the analog part for an RDS-receiver, the RDS-detector, is discussed in this paper. The RDS-receiver is develop ed towards low voltage applications (1.8 V) with low power consumption requirements. A new topology for RDS-receivers is introduced resultin g in an important quality improvement, mainly being a higher phase-lin earity and a lower power consumption. The performance of the chip is c ompared to existing RDS-receivers. These receivers use an analog integ rated bandpass filter. In the presented topology direct conversion fol lowed by lowpass filtering is used. The chip is realised in a fully di fferential switched-capacitor technique with correlated double samplin g. The latter is used to obtain a very low equivalent input DC-offset. The chip is implemented in a 2 mu m BiCMOS technology.