A CMOS STEERING-CURRENT MULTIPLYING DIGITAL-TO-ANALOG CONVERTER

This paper discusses the design and integrated circuit implementation of two alternative solutions for realizing an 8-bit high-speed steerin g-current multiplying digital-to-analog converter based on a current-s ource-array architecture. In the first solution, designated as voltage -controlled-current-source operation, a reference voltage is used to d rive directly the gate-to-source voltage of the current-sources while in the second solution, designated as geometry-programmable-current-so urce operation, the current-sources are generated using a digitally pr ogrammable transistor-array. The characteristics of both solutions are discussed from the viewpoints of the accuracy and distortion introduc ed by the multiplying function. For demonstration purposes a prototype chip suitable for both operating modes has been fabricated in a singl e-poly 1.2 mu m CMOS digital technology. At 5 V supply and 13.3 mA ful l-scale output current, the chip dissipates about 90 mW for a sampling frequency of 50 MHz. The die area is approximately 1.75 mm(2).