256-STAGE SUPERCONDUCTING DIGITAL CORRELATOR WITH ANALOG OUTPUT

We report the development of a 256-stage, one-bit superconducting digi tal correlator functionally tested at a highest clock frequency of 10. 232 GHz and data rate of 1.279 Gb/s. The correlator consists of two 25 6-bit shift registers for delay and storage, 256 exclusive-OR gates fo r multiplication, and 256 shunted SQUID's to produce an analog summing output. It is fabricated using a Nb/AlOx/Nb Josephson-junction proces s at a critical-current density of 1000 A/cm(2). The 5-mm square chip uses about 4350 Nb/AlOx/Nb Josephson junctions and consumes about 0.4 mW.