RADIATION-DAMAGE INVESTIGATION FOR THE DESIGN OF A HARDENED FAST BIPOLAR MONOLITHIC CHARGE SENSITIVE PREAMPLIFIER

In order to implement a high-speed, radiation hardened, charge sensiti ve preamplifier (CSP) in the monolithic 2 mu m BiCMOS technology (call ed HF2CMOS), the performance of the available NPN and PNP transistors were measured, before and after neutron irradiation. Furthermore, also monolithic CSPs, realized with the same technology, were irradiated a nd investigated. Results on the neutron irradiation effect on the base spreading resistance(r(bb')) of the CSP input NPN-transistor are pres ented. Design strategies, to reduce the radiation damage effects in th e CSP performance, were studied. Results confirm that the HF2CMOS proc ess is suitable to sustain the radiation environment of the future LHC collider. A design for a new CSP version is proposed. A novel method for measuring the series noise of the CSP, at large input capacitances , was used. The method minimized the errors caused by the CSP rise-tim e.