LINEAR-ARRAY IMPLEMENTATION OF THE EM ALGORITHM FOR PET IMAGE-RECONSTRUCTION

The PET image reconstruction based on the EM algorithm has several att ractive advantages over the conventional convolution backprojection al gorithms, However, the PET image reconstruction based on the EM algori thm is computationally burdensome for today's single processor systems , In addition, a large memory is required for the storage of the image , projection data, and the probability matrix. Since the computations are easily divided into tasks executable in parallel, multiprocessor c onfigurations are the ideal choice for fast execution of the EM algori thms. In this study, we attempt to overcome these two problems by para llelizing the EM algorithm on a multiprocessor system, The parallel EM algorithm on a linear array topology using the commercially available fast floating point digital signal processor (DSP) chips as the proce ssing elements (PE's) has been implemented. The performance of the EM algorithm on a 386/387 machine, IBM 6000 RISC workstation, and on the linear array system is discussed and compared. The results show that t he computational speed performance of a linear array using 8 DSP chips as PE's executing the EM image reconstruction algorithm is about 15.5 times better than that of the IBM 6000 RISC workstation. The novelty of the scheme is its simplicity, The linear array topology is expandab le with a larger number of PE's. The architecture is not dependent on the DSP chip chosen, and the substitution of the latest DSP chip is st raightforward and could yield better speed performance.