IDENTIFYING UNTESTABLE FAULTS IN SEQUENTIAL-CIRCUITS

This article proposes an efficient method to identify untestable fault s in sequential circuits. It uses a controllability calculation and sy mbolic simulation procedure that propagates the characteristics of unk nown initial flip-flop states throughout the circuit. Identifying flip -flops that cannot be initialized and circuit lines that cannot be jus tified to definite values, this process classifies and identifies four types of untestable faults. Experimental results show that it improve s the efficiency of a test generation system.