ON THE GENERATION OF AREA-TIME OPTIMAL TESTABLE ADDERS

We present a performance driven generator for integer adders which has the following interesting feature: The generator is parametrized in t he operands' bitlength n, the delay of the addition t(n), and the faul t model FM. FM may in particular be chosen as the classical stuck-at f ault model, the cellular fault model or the robust path delay fault mo del. The output of the generator is a performance oriented conditional sum type adder, i.e., an area-minimal n-bit adder of the ''conditiona l sum type'' with delay less than or equal to t(n) (if it exists) toge ther with a small complete test set with respect to the chosen fault m odel FM.