DESIGN OF SFQ-COUNTING ANALOG-TO-DIGITAL CONVERTER

We describe the design of an oversampling single-flux-counting analog- to-digital converter with the estimated bandwidth of a few tens MHz, b ased on Rapid Single-Flux-Quantum (RSFQ) devices. It consists of an in put analog circuit, highspeed quantizer with an original analog/digita l negative feedback loop, decimation (comb) filter, and supporting sub sysems including clock distribution circuits,quantization signal condi tioner, and output drivers. We have applied a new approach, the 'symme trizing' negative feedback, to free the quantizer from the intrinsic h ysteresis without dynamic range sacrifice. The 16-bit version of the s ystem comprises about 1,500 Josephson junctions and consumes 1.2 mW of de power, when implemented using Nb-trilayer technology with 1 - kA/c m(2), 3.5 - mu m Josephson junctions. All subsystems of the converter have been successfully tested and testing of the system as a whole is in progress.