SUPERCONDUCTING INTEGRATED-CIRCUIT FABRICATION WITH LOW-TEMPERATURE ECR-BASED PECVD SIO2 DIELECTRIC FILMS

A superconducting integrated circuit fabrication process has been deve loped to encompass a wide range of applications such as Josephson volt age standards, VLSI scale array oscillators, SQUIDs, and kinetic-induc tance-based devices. An optimal Josephson junction process requires lo w temperature processing for all deposition and etching steps. This lo w temperature process involves an electron cyclotron resonance-based p lasma-enhanced chemical vapor deposition of SiO2 films for interlayer dielectrics. Experimental design and statistical process control techn iques have been used to ensure high quality oxide films. Oxide and nio bium etches include endpoint detection and controlled overetch of all films. An overview of the fabrication process is presented.