A SUPERCONDUCTIVE RING-PIPELINED NETWORK SYSTEM

A superconductive ring-pipelined network system is proposed to improve performance of multi-processor systems, and a prototype chip is desig ned. A throughput of a data exchange between processor elements limits the effective performance of the multi-processor systems. The feature s of the superconductive ring-pipelined network system are a high-cloc k-frequency operation by using high-speed Josephson gates and wide ban d superconductive transmission lines, and a high-density package becau se of its low power consumption. These advantages significantly reduce pipeline loss and improve flexibility in data exchange. Therefore, th is network system is capable of improving the overall effective perfor mance of multi-processor systems. The prototype chip consists of three Josephson ring interface circuits and superconductive interconnection s positioned in between these interface circuits. There are a total 1, 130 gates. The prototype chip is designed to be operated up to a clock frequency of 10GHz. Therefore, the total system throughput is estimat ed to be 60Gbps.