We are discussing a general-purpose microprocessor architecture that i
s suitable for implementation using the Rapid Single-Flux-Quantum (RSF
Q) family of logic-memory circuits. While the microprocessor provides
a functionally complete RISC instruction set with 16-bit words, a bit-
serial self-timed approach makes it simple enough to be fabricated usi
ng the current Josephson junction technology. Our plans are to design,
fabricate and test a completely operational prototype of this system.