HIGH-SENSITIVITY INP-BASED MONOLITHICALLY INTEGRATED PIN HEMT RECEIVER OEIC FOR 10 GB S/

InP-based pin-HEMT receiver-OEIC's with different circuit layouts for bit rates up to 10 Gb/s are simulated, realized and chararterized. The circuits under investigation are a high impedance amplifier, a common -gate circuit, and a transimpedance-cascode circuit. The high frequenc y behavior of all circuits is compared by means of on wafer-characteri zation. All circuits show a bandwidth of more than 5 GHz, the transimp edance circuit has the highest responsivity (12.9 dB A/W) and a very l ow average noise current of 11.5 pA/root Hz when assembled in a module . The receiver sensitivity of the transimpedance circuit in the module is measured to be as high as -19.2 dBm.