This article reports on an engineering project at the TUHH aimed at pr
oviding a massively parallel experimental computer system to support a
number of research projects. The computer nicknamed the PENTAGON is a
n MIMD system containing a number of identical processing elements (PE
's) linked via interfaces. The network is a 3-D torus, and the nodes a
re based on off-the-shelf signal processor chips, namely TMS 320C40's
from TI. The design adds to these standard ingredients an engineering
discipline to keep things as simple as possible, and a corresponding,
quite unusual physical setup of the total system. These make up for a
very cost effective system showing how simple it may be to build a pow
erful parallel machine. Although based on a standard architecture, the
PENTAGON design takes some special choices, the most important being
the complete distribution of I/O capabilities. This provides for an un
limited I/O bandwidth, the support of realtime applications and excell
ent capabilities of expansion. A graphics interface has been designed
to provide direct realtime output from the DSP's. Another recent exten
sion is a set of Power-PC modules on top of the DSP nodes. Besides sta
ndard commercial compilers for 'C40 networks, the functional language
Fifth of the author has been implemented on the PENTAGON. Fifth provid
es facilities such as distributed objects and the automatical distribu
tion of parallel programs. For well parallelizable applications such a
s the calculation of a Mandelbrot set, high efficiencies in the usage
of the processors have been obtained.