EXPERIENCE WITH THE IBM ZISC036 NEURAL-NETWORK CHIP

Citation
Cs. Lindsey et al., EXPERIENCE WITH THE IBM ZISC036 NEURAL-NETWORK CHIP, International journal of modern physics C, 6(4), 1995, pp. 579-584
Citations number
13
Categorie Soggetti
Mathematical Method, Physical Science","Physycs, Mathematical","Computer Science Interdisciplinary Applications
ISSN journal
01291831
Volume
6
Issue
4
Year of publication
1995
Pages
579 - 584
Database
ISI
SICI code
0129-1831(1995)6:4<579:EWTIZN>2.0.ZU;2-4
Abstract
The new IBM Zero Instruction Set Computer (ZISC) provides a radial bas is function neural network. The first generation chip (ZISC036) allows for 64 8-bit inputs, 36 RBF neurons in the middle layer, and up to 16 383 possible output categories. Forward processing takes 4 mu s with a 20MHz clock. Cascading multiple chips increases the number of availab le RBF's with no increase in processing time. The chip also executes a learning algorithm. We report on tests of the ZISC with a high energy physics related task.