PROCESS AND DEVICE TECHNOLOGIES FOR HIGH-SPEED SELF-ALIGNED BIPOLAR-TRANSISTORS

Citation
T. Nakamura et al., PROCESS AND DEVICE TECHNOLOGIES FOR HIGH-SPEED SELF-ALIGNED BIPOLAR-TRANSISTORS, IEICE transactions on electronics, E78C(9), 1995, pp. 1154-1164
Citations number
NO
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
09168524
Volume
E78C
Issue
9
Year of publication
1995
Pages
1154 - 1164
Database
ISI
SICI code
0916-8524(1995)E78C:9<1154:PADTFH>2.0.ZU;2-L
Abstract
Recent high-speed bipolar technologies based on SICOS (Sidewall Base C ontact Structure) transistors are reviewed. Bipolar device structures that include polysilicon are key technologies for improving circuit ch aracteristics. As the characteristics of the upward operated SICOS tra nsistors are close to those of downward transistors, they can easily b e applied in memory cells which have near-perfect soft-error-immunity. Newly developed process technologies for making shallow base and emit ter junctions to improve circuit performance are also reviewed. Finall y, complementary bipolar technology for low-power and high-speed circu its using pnp transistors, and a quasi-drift base transistor structure suitable for below 0.1 mu m emitters are discussed.