A 6-B, 4 GSA S GAAS HBT ADC

Citation
K. Poulton et al., A 6-B, 4 GSA S GAAS HBT ADC, IEEE journal of solid-state circuits, 30(10), 1995, pp. 1109-1118
Citations number
8
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00189200
Volume
30
Issue
10
Year of publication
1995
Pages
1109 - 1118
Database
ISI
SICI code
0018-9200(1995)30:10<1109:A64GSG>2.0.ZU;2-0
Abstract
A GaAs/AlGaAs Heterojunction Bipolar Transistor (HBT) process was deve loped to meet the speed, gain, and yield requirements for analog-to-di gital converters (ADC's). The HBT has current gain of over 100 and f(T ) and f(MAX) of over 50 GHz, A 6-b, 4 GSa/s (4 giga-samples/s) ADC was designed and fabricated in this process, The ADC uses an analog foldi ng architecture, includes an on chip master-slave track-and-hold (T/H) circuit, and provides Gray-encoded digital outputs, The ADC achieves 5.6 effective bits at 4 GSa/s, a faster clock rate than any noninterle aved semiconductor ADC reported to date, It has a resolution bandwidth (the frequency at which effective bits has dropped by 0.5 b) of 1.8 G Hz at 4 GSa/s, higher than any published ADC, The chip operates at up to 6.5 GSa/s, GaAs HBT IC's are especially prone to high operating tem peratures, This led to reliability problems that were overcome by the use of a fast dc thermal simulator written for this project. A SPICE m odel for self-heating effects is also described.