A TRACE-DRIVEN SIMULATOR FOR PERFORMANCE EVALUATION OF CACHE-BASED MULTIPROCESSOR SYSTEMS

We describe a simulator which emulates the activity of a shared memory , common bus multiprocessor system with private caches. Both kernel an d user program activities are considered, thus allowing an accurate an alysis and evaluation of coherence protocol performance. The simulator can generate synthetic traces, based on a wide set of input parameter s which specify processor, kernel and workload features. Other paramet ers allow us to detail the multiprocessor architecture for which the a nalysis has to be carried out, An actual-trace-driven simulation is po ssible, too, in order to evaluate the performance of a specific multip rocessor with respect to a given workload, if traces concerning this w orkload are available. In a separate section, we describe how actual t races can also be used to extract a set of input parameters for synthe tic trace generation. Finally, we show how the simulator may be succes sfully employed to carry out a detailed performance analysis of a spec ific coherence protocol.