FABRICATION OF SI NANOSTRUCTURES FOR SINGLE-ELECTRON DEVICE APPLICATIONS BY ANISOTROPIC ETCHING

Citation
T. Hiramoto et al., FABRICATION OF SI NANOSTRUCTURES FOR SINGLE-ELECTRON DEVICE APPLICATIONS BY ANISOTROPIC ETCHING, JPN J A P 1, 35(12B), 1996, pp. 6664-6667
Citations number
6
Categorie Soggetti
Physics, Applied
Volume
35
Issue
12B
Year of publication
1996
Pages
6664 - 6667
Database
ISI
SICI code
Abstract
Si nanostructures for single electron device applications are successf ully fabricated using a newly developed anisotropic etching technique. The minimum size of the Si nanostructures is about 10 nm, which is mu sh smaller than the lithography limit. The novel process involves two anisotropic etching steps and one selective oxidation step. and is ful ly compatible with very large scale integration (VLSI) processes. Scan ning electron microscopy (SEM) and atomic force microscopy (AFM) obser vations indicate that the fabricated nanostructures are very uniform a nd atomically controlled. This process is promising for the future int egration of single electron devices into VLSI chips.