A MULTI-ASIC REAL-TIME IMPLEMENTATION OF THE 2-DIMENSIONAL AFFINE TRANSFORM WITH A BILINEAR INTERPOLATION SCHEME

Citation
Mj. Bentum et al., A MULTI-ASIC REAL-TIME IMPLEMENTATION OF THE 2-DIMENSIONAL AFFINE TRANSFORM WITH A BILINEAR INTERPOLATION SCHEME, Journal of VLSI signal processing, 10(3), 1995, pp. 261-273
Citations number
13
Categorie Soggetti
Computer Sciences, Special Topics","Engineering, Eletrical & Electronic","Computer Science Information Systems
ISSN journal
09225773
Volume
10
Issue
3
Year of publication
1995
Pages
261 - 273
Database
ISI
SICI code
0922-5773(1995)10:3<261:AMRIOT>2.0.ZU;2-7
Abstract
Some image processing applications (e.g. computer graphics and robot v ision) require the rotation, scaling and translation of digitized imag es in real-time (25-30 images per second). Today's standard image proc essors can not meet this timing constraint so other solutions have to be considered. This paper describes a multi-ASIC solution which is cap able of doing the image processing tasks in real-time. The first ASIC is a so-called affine transformer which calculates a one-dimensional c oordinate every 25 ns. The second ASIC is a bilinear interpolator whic h calculates an interpolated value from four known surrounding values, again every 25 ns. This ASIC is designed in a modular setup which res ults in a flexible accuracy of the interpolation. If more accurate int erpolation is required, another ASIC (containing an interpolation stag e) is used. In this way for each application a proper accuracy is impl emented, reaching optimal silicon area utilization and desired accurac y of interpolation. Using two affine transformers (for obtaining a two dimensional coordinate pair) and an interpolator, one can build a sys tem which can translate, rotate and scale an image of size 1024 1024 in real-time (25-30 images per second). In this paper the system as w ell as the design of the ASICs are presented.