Y. Sakai et al., A SYNCHRONOUS DRAM WITH NEW HIGH-SPEED I O LINES METHOD FOR THE MULTIMEDIA AGE/, IEICE transactions on electronics, E78C(7), 1995, pp. 782-788
As microprocessor units have become faster, DRAMs have also been requi
red to become faster. One of the fast DRAMs is the synchronous DRAM, w
hich transfers data at a high rate. We have developed a 100-MHz Synchr
onous DRAM using pipeline architecture and new high speed I/O lines me
thod. This paper describes some features of this DRAM and its new pipe
line architecture.