VLSI ARCHITECTURES FOR COMPUTING X-MOD-M

The implementation of residue number system based arithmetic processor s has been made feasible by the recent developments in microelectronic s. New VLSI architectures are proposed for computing the integer modul e operation X mod m, when m is restricted to the values 2(k), 2(k) +/- 1 and composite numbers whose mutually prime factors fall in the abov e category. Two different design methodologies, namely the recursive a nd partition methods are presented, and their respective VLSI computat ional complexities are analysed. A VLSI chip that computes X mod m, wh ere X is a 16-bit number and m = 3, 5, 6, 7, 9 and 10, has been implem ented using the proposed schemes in 3 mu m CMOS technology, and typica l measurements have yielded a propagation delay of less than 109 ns.