ELECTRICAL-PROPERTIES OF INTERLEVEL DEPOSITED OXIDES RELATED TO POLYSILICON PREPARATION

Few papers investigated the electrical properties of interlevel high t emperature oxides low pressure chemically vapour deposited (LPCVD HTO) SiO2. Silicon dioxide obtained by the surface reaction between SiH2Cl 2 and N2O at 900-degrees-C on LPCVD polysilicon shows lower electrical conductivity in comparison to SiO2 thermally grown on polysilicon. It was demonstrated a Fowler-Nordheim mechanism for the electrical condu ction through the LPCVD HTO SiO2 interpoly dielectrics (2). This paper studies the effect of deposition temperature (in the range of 530-deg rees-C - 613-degrees-C) of LPCVD silicon on the electrical properties of interlevel HTO LPCVD SiO2 films deposited on ph doped layers. Phosp horous drive-in from POCl3 was performed in N2 ambient in order to avo id any interface roughness due to thermal oxidation. The low field ele ctrical conduction through these HTO layers can be about one order of magnitude decreased by reducing the deposition temperature of polysili con from 560 to 530-degrees-C while the currents from high fields are not essentially reduced. These results are explained in terms of surfa ce roughness decrease as a function of lowering of deposition temperat ure. The breakdown fields of LPCVD HTO SiO2 layers, in the range of 8- 10 MV/cm, prove the high quality of the dielectric. It is demonstrated that the dielectric breakdown phenomenon originates in the bulk of LP CVD HTO SiO2 films. Based on this experimental study, an improved tech nology of interlevel structures for polysilicon floating gate EEPROM d evices can be proposed.