EXPLORATION OF LOCOS-TYPE ISOLATION LIMIT USING SUPERSILO ISOLATION BY RAPID THERMAL NITRIDATION OF SILICON

The limits for overcoming shrinking localized oxidation of silicon typ e isolation in the subhalfmicron design rules area are considered: geo metric limitations and field implant defect generation are investigate d. A super sealed interface local oxidation (SUPERSILO) field isolatio n process using rapid thermal nitridation of silicon is characterized in terms of morphology, defect density, and electrical performance. Wi th this isolation an encroachment lower than 100 nm is obtained in a l arge field area of 400 nm finished field oxide. Field oxide thinning a nd comer encroachment are minimized compared to other conventional iso lations and make this process a better candidate for scaling down to 0 .7 mum active area pitch design rules. The compatibility with low gate oxide defect density for a thickness as low as 7 nm is demonstrated. Several boron p+ field channel stop implant processes are investigated by characterizing three different scenarios: implanting before field oxidation (classical), through field oxide after the oxidation mask re moval (field-retro), and through the poly gate material (poly-retro). In order to avoid defect generation, the retrograde scenarios will be the solution in the future. The poly-retro scenario is the one that re duces boron segregation by a factor of about 10 with respect to the cl assical scenario and allows high performance without affecting the sus taining voltage. The use of a 0-degrees tilt boron implant at 350 keV through the field oxide and poly gate material stack is shown to be pr acticable and reproducible.