CHARACTERIZATION OF COLLECTOR-EMITTER LEAKAGE IN SELF-ALIGNED DOUBLE-POLY BIPOLAR JUNCTION TRANSISTORS

Collector-emitter leakage (CE leakage) is an inherent problem in bipol ar technology. In this paper, we have investigated a variety of proces s steps that improve the CE leakage performance in a self-aligned doub le poly poly-emitter bipolar integrated circuit process. Stress genera ted from deep trench processing and damage from reactive ion etching ( RIE) are identified as major sources of CE leakage. Lack of substrate gettering capabilities, stress generated from furnace operations as we ll as inadequate prevention of device punch-through phenomenon are als o shown to create CE leakage. Several experiments that identify the CE leakage sources and improve circuit performance are presented.