TRIMMING CMOS SMART IMAGER WITH TUNNEL-EFFECT NONVOLATILE ANALOG MEMORY

Amplified MOS imagers (AMIs) have the advantage of being compatible wi th conventional CMOS analogue/digital circuit design. One of the major problems in AMIs is their large fixed pattern noise compared to CCD i magers. The Letter presents the structure of a nonvolatile tunnel-effe ct analogue memory which is fully compatible with a standard CMOS proc ess and which can reduce significantly the offset-like fixed pattern n oise in AMI arrays.