HIGH-LEVEL SYNTHESIS OF SELF-RECOVERABLE ASICS LASING MICRO ROLLBACK

An efficient design methodology for the synthesis of self-recoverable application-specific integrated circuits (ASICs) from behavioural leve l specifications is presented. The synthesis process uses a novel appr oach based on a problem-space genetic algorithm to perform concurrent scheduling and allocation of functional units, registers and multiplex ers. The proposed problem-space genetic algorithm based synthesis syst em combines the power of a genetic algorithm (a global search method) with a known heuristic to search a large design space in an intelligen t way in order to find a global optimal solution. A checkpoint inserti on algorithm for recovery from transient faults using micro rollback i s an integrated part of the process of synthesizing cost-effective fau lt-tolerant ASICs under the available number of hardware resources. Th e system allows multi-cycle functional units as well as structural pip elining. Experiments on benchmarks show very promising results.