A 9-NS 16-MB CMOS SRAM WITH OFFSET-COMPENSATED CURRENT SENSE AMPLIFIER

Citation
K. Seno et al., A 9-NS 16-MB CMOS SRAM WITH OFFSET-COMPENSATED CURRENT SENSE AMPLIFIER, IEEE journal of solid-state circuits, 28(11), 1993, pp. 1119-1124
Citations number
7
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00189200
Volume
28
Issue
11
Year of publication
1993
Pages
1119 - 1124
Database
ISI
SICI code
0018-9200(1993)28:11<1119:A91CSW>2.0.ZU;2-R
Abstract
A 9-ns 16-Mb CMOS SRAM has been developed using a 0.35-mu m CMOS proce ss. The current-mode fully nonequalized data path has been realized in CMOS SRAM for the first time by using a stabilized feedback current-s ense amplifier (SFCA) that provides a small input resistance and an of fset compensation effect. To reduce the test time, a bit-line wired-OR parallel test circuit has been implemented.