ON WAFER-PACKING PROBLEMS

Wafer packing is a process of combining multiple chip designs on the s ame wafer such that the fabrication cost can be shared by several desi gns and hence reduced. This technique is widely used for designs that require a small number of dies or chips. It is essential to have compu ter algorithms to decide how to allocate designs to wafers in order to reduce the total fabrication cost. Based on different wafer fabricati on techniques, two versions of the wafer packing problem are formulate d. We study different variations for each version. We present algorith ms to find optimal solutions for these variations which are polynomial -time solvable. We also present heuristic algorithms for those proven to be NP-hard. The effectiveness of the proposed algorithms is demonst rated by experimental results.